Design Document

Design Document available here

Project Write-up available here

Note: There might be a bug in Google docs preview that causes Roman numerals to be displayed as decimals; so pages 1-4 are seen twice in the writeup.

EQ, Comm, and more plots

Pink noise, 4096-point FFT, Odd bands set to pass, others set to stop.

We have a working 10-band EQ implemented. All band gains, L + R attenuation (volume/balance), and EQ enable/disable are settable over the serial port.

FIR Low-pass filter and I2C comm test

Hi all. After taking a good look at the DMA controller documentation for the DSP, and after calculating the coefficients for a 32-tap FIR low-pass filter (in MATLAB... hahaha), we've finally arrived at something that works!


The left channel has the filter enabled, and its frequency response is shown as the blue plot. The right channel is a simple pass-through, and its response is the red plot. To get the responses, we used NCH Tone Generator to generate white noise. The noise signal is patched through the SPDIF output from my computer to the DSP board. The output is sampled using an M-Audio Conectiv, connected via 3.5mm to RCA cable. Lastly, we used Adobe Audition to capture the output and provide some signal analysis.


Arriving at a working filter wasn't easy. Some of the things that we had to take into account were:

• Compiler limitations - The free DSP563CC compiler doesn't provide intrinisics necessary to fully utilize the DSP features, like a circular buffer data-type, parallel memory moves, and multiple memory space access. Many of these issues required the use of very hack-ish use of ASM, especially with respect to setting up the filter co-processor.
• Performance limitations - Since we resorted to using a slower (cheaper!) DSP, we had to be mindful with how we coded up everything, while keeping everything clear and maintainable. We are also limited with how complex we can make the filter (# of taps) due to memory and speed constraints.
  

Now that we're confident with constructing filters on this DSP, our next goal is to move forward and crunch the numbers for the 10 band-pass filters that we need for the equalizer portion of the project.

Another goal that we've arrived at is the completion of the I2C architecture, which will provide the comm bridge that we've made earlier with something to talk to.

LCD test

LCD test, an small black heart image

Hardware of the Front End

Front End system

Experimenting with PICs

In order to experiment with PICS I used a PIC16F684 and wrote a flashing led program. However for our actual design we need a PIC with more pins (PIC16F684 has 14 pins) to handle the LCD that will be part of the front end of our system. We decided to use a PIC18F4331, but ran into some problems with programing resulting in a message "Programming failed at Program Memory address 0x000000." After much work we realized that AVDD and AVSS must be connected since they provide a reference voltage for the A/D converter. After fixing this we were finally able to write to the PIC.

Bridge PCB -> Bridge PCBA

Here's the assembled I2C<->RS232 bridge in its fully-assembled glory.

Yes, I know, the leftover flux looks kinda nasty, but it works!* All that's left hardware-wise (we hope) is the front-end assembly, which will be done on a breadboard.

edit: I went ahead and ported the SFBP state-machine I whipped up for the back-end SIM utility to the PIC and everything functions as expected. I used the Advanced Serial Port Terminal by Eltima Software to do some preliminary tests. Once all the commands are implemented (so much as to return dummy values), I'll go forward and try it with the test utility that the front-end team made.

*It works, but with a few hacks. In the schematic, I flipped the PGD and PGC ICSP programming pins, which was easily fixed by exchanging the wires on the cable. I also would've preferred the power traces to be wider and should've laid-out some space for the RS-232 connector. Coulda' woulda' shoulda'.